1. Technical Field of the Present Invention
The present invention generally relates to buried resistors in integrated circuits and, more specifically, to methods and apparatuses that compensate for variances in the resistance of the buried resistor during operation of the integrated circuit.
2. Description of Related Art
Buried Resistors (BRs) are used in integrated circuits for multiple purposes such as resistance matching in transmitters and receivers. Unfortunately, the resistance of the Buried Resistor (BR) changes as its temperature increases or decreases.
The significance of accounting for these resistance variations has become increasingly important as the clock speeds of the integrated circuits continue to rise. This results from the need for accurate resistance matching to support the increased clock speed and the thermal fluctuations from the increased switching. In addition, these resistance variations are even more pronounced in Silicon-On-Insulator technologies since the buried oxide layer located beneath the resistor acts as a thermal insulator.
Circuit designers have created a number of solutions for compensating for these variations in BR resistance. For example, one design uses multiple resistance branches in parallel that can be selectively turned on to create the desired resistance. The number of resistors that are turned on is based on a predetermined algorithm that uses the time-averaged bulk temperature of the integrated circuit.
Unfortunately, these current solutions fail to provide accurate resistance matching during all phases of the operation of the integrated circuit and are not sufficiently dynamic so as to account for temperature swings that happen during switching.
It would, therefore, be a distinct advantage to have a method and apparatus that can accurately compensate for dynamic variances in the resistance of a BR during switching or otherwise caused from thermal variances.